Payment Terms :T/T, Western Union, Paypal, Trade Assurance, Credit Card
Supply Ability :640 pcs
Delivery Time :3-5 Day
Packaging Details :International Standard Packaging
Category :Programmable Logic ICs
Condition :Original 100%,Brand New and Original,New
Number of I/Os :285 I/O
Product :Artix-7
Package / Case :FCBGA-484
Distributed RAM :2888 kbit
Embedded Block RAM - EBR :13140 kbit
Data Rate :6.25 Gb/s
Service :BOM Kitting
Lead time :In Stock,contact us
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XC7A200T-1FBG484C IC FPGA 285 I/O FCBGA-484 Artix-7
Product Attribute
Attribute Value
Xilinx
FPGA - Field Programmable Gate Array
Artix-7
215360
285 I/O
1 V
0 C
+ 85 C
SMD/SMT
FCBGA-484
Data Rate:
6.25 Gb/s
Series:
XC7A200T
Brand:
Xilinx
Distributed RAM:
2888 kbit
Embedded Block RAM - EBR:
13140 kbit
Moisture Sensitive:
Yes
Number of Transceivers:
4 Transceiver
Product Type:
FPGA - Field Programmable Gate Array
Factory Pack Quantity:
1
Subcategory:
Programmable Logic ICs
Tradename:
Artix
Unit Weight:
2.483610 oz
Summary of 7 Series FPGA Features
• Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory. • 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering. • High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s. • High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering special low-power mode, optimized for chip-to-chip interfaces. • A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors. • DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.
• Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high precision and low jitter. • Quickly deploy embedded processing with MicroBlaze™ processor. • Integrated block for PCI Express® (PCIe), for up to x8 Gen3 Endpoint and Root Port designs. • Wide variety of configuration options, including support for commodity memories, 256-bit AES encryption with HMAC/SHA-256 authentication, and built-in SEU detection and correction. • Low-cost, wire-bond, bare-die flip-chip, and high signal integrity flipchip packaging offering easy migration between family members in the same package. All packages available in Pb-free and selected packages in Pb option. • Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 0.9V core voltage option for even lower power.
